APEX AD600
Circuit Diagrams

1 VCC VCC

2 VCC R132 1k

3

4

I²C Addr = 0xA0
U8 H 1 2 3 4 A0 A1 A2 GND 24C01A VCC NC SCL SDA 8 7 6 5 VCC

R131 1k

RSEL=1 -> 8 bit ROM drive drive.sch HA2 VCC VSS HA1 HA0 HCS3FX# HCS1FX# HIOCS16# HRD#/DCI_ACK# HWR#/DCI_CLK VCC VSS HIORDY HRST# HIRQ/DCI_ERR# HRDQ# HWRQ#/DCI_REQ# HD15 HD14 VCC VSS HD13 HD12 HD11 HD10 HD9 HD8/DCI_FDS# HD7/DCI7 VCC VSS HD6/DCI6 HD5/DCI5 HD4/DCI4 HD3/DCI3 HD2/DCI2 HD1/DCI1 HD0/DCI0 VCC VSS HSYNCH# VSYNCH# PCLKQSCN PCLK2XSCN YUV7 YUV6 YUV5 VSS VCC YUV4 YUV3 YUV2 YUV1 YUV0 DCLK VCC VSS DSCK DQM DCS0# VCC VSS DCS1# DB15 DB14 DB13 DB12 VCC VSS DB11 DB10 DB9 DB8 DB7 DB6 VSS VCC DB5 DB4 DB3 DB2 DB1 DB0 VSS VCC DRAS0# DRAS0# DRAS0# DWE# DOE#/DSCK_EN DCAS# VCC VSS DMA11 DMA10 DMA9 DMA8 DMA7 DMA6 VSS VCC DMA5 DMA4 DMA3 DMA2 DMA1 DMA0 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 HA2 +3.6V HA1 HA0 HCS3 HCS1# HIOCS16# HRD# HWR# +3.6V HIORDY HRST# HIRQ HD15 HD14 +3.6V HD13 HD12 HD11 HD10 HD9 HD8 HD7 +3.6V HD6 HD5 HD4 HD3 HD2 HD1 HD0 +3.6V VIDEO HSYNC VSYNC 27MHz YUV7 YUV6 YUV5 +3.6V YUV4 YUV3 YUV2 YUV1 YUV0 +3.6V DRAM DSCK DQM DCS0# +3.6V DCS1# DB15 DB14 DB13 DB12 +3.6V DB11 DB10 DB9 DB8 DB7 DB6 +3.6V DB5 DB4 DB3 DB2 DB1 DB0 +3.6V DRAS0# DWE# DCAS# +3.6V DMA11 DMA10 DMA9 DMA8 DMA7 DMA6 +3.6V DMA5 DMA4 DMA3 DMA2 DMA1 DMA0 DRAM.sch VIDEO.sch CV2 CV1 LU CH
CV2 CV1 LU CH SPD

H

U1 C1 CN1 1 2 3 4 5 6 HEADER 6 VCC
IR FD-CS FD-CLK FD-DAT

159
SDA 160 SCL 161 FD-DAT 162

VPP AUX0 AUX1 AUX2 VSS VCC AUX3 AUX4 AUX5 AUX6 AUX7 LOE# VSS VCC LCS0# LCS1# LCS2# LCS3# VSS LD0 LD1 LD2 LD3 LD4 VCC VSS LD5 LD6 LD7 LD9 LD8 LD10 LD11 VSS VCC LD12 LD13 LD14 LD15 LWRLL# LWRHL# VSS VCC NC NC LA0 LA1 LA2 LA3 VSS VCC LA4 LA5 LA6 LA7 LA8 LA9 VSS VCC LA10 LA11 LA12 LA13 LA14 LA15 LA16 VSS VCC LA17 LA18 LA19 LA20 LA21 RESET# TDMDX/RSEL VSS VCC TDMDR TDMCLK TDMFS TDMTSC# TWS/SEL_PLL1 TSD/SEL_PLL0 VSS VCC SEL_PLL2 NC NC MCLK TBCK SPDIF_DOBM NC VSS VCC RSD RWS RBCK APLLCAP XIN XOUT VCC VSS ESS4308

R30 33R

R28 4k7

CAP

163

LMEM LMEM.sch LOE#

164 K-CDO 165 IRR 166 167 FD-CS 168 FD-CLK 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 189 188 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

G LCS0# EMRST# LCS2# LCS3# LD[0..15]

G

F +3.6V

F

1

CN6 1 2 3 4 5 6 7 HEADER 7

WRLL# WRHL# +3.6V

LA0 LA1 LA2 LA3 E LA4 LA5 LA6 LA7 LA8 LA9 +3.6V LA10 LA11 LA12 LA13 LA14 LA15 LA16 +3.6V LA17 LA18 LA19 LA20 LA21 RESET# +3.6V AUDIO AUDIO.sch K-CS# K-SCK AUD-RST# K-CDI K-CDO PCM-ML PCM-MC PCM-MD TWS TSD0 +3.6V C CN4 1 2 3 4 5 6 7 8 HEADER 8 AGD CN3 1 2 CON2 B AGD MIC C27 CAP +3.6V C26 100n
AOR AOL ZER KAR KAL MUT

SDA SCL RST# E

+3.6V

PCM-MD PCM-ML PCM-MC K-CDI K-SCK K-CS MUTE

D

D

R54

4k7 +3.6V

R56 R51 R54

4k7 DNF DNF

+3.6V

C

AOR AOL ZERO KAR KAL

MCLK TBCK

+3.6V 27MHz

B

R129 33R

VAA CN5 1 2 3 4 5 6 HEADER 6
AGD VAA VCC GND GND 3.6V

VCC +3.6V Clock & Power CLK_PWR.sch CPU-CLK DCLK PCLK2 27MHz

TP1 CON1

PCLK2

A

A AGD RESET#

AD600 - Video Board - Top sheet. 1/7 (Note. DNF means not fitted)
1 2 3 4