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Home >> SANYO >> C25EG65NB-00 Service Manual
 
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SANYO C25EG65NB-00
Service Manual


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  • Contains Circuit Diagrams
  • Download
  • PDF Format
  • Complete manual
  • Language: English
Price: $4.99

Description of SANYO C25EG65NB-00 Service Manual

Complete service manual in digital format (PDF File). Service manuals usually contains circuit diagrams, printed circuit boards, repair tips, wiring diagrams, block diagrams and parts list. Service Manual ( sometimes called Repair Manual ) is used mainly by technicians.

If You just want to know how to use Your tv, video, mp3 player etc. You should look for Owner's Manual. After placing order we'll send You download instructions on Your email address.

The manual is available in languages: English

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Text excerpt from page 5 (click to view)
6. HORIZONTAL OUTPUT A horizontal oscillation signal is output from pin37 of IC201 and switches the drive transistor Q431. This switching signal is current amplified by the drive transformer T431 and drives the output transistor Q432. When Q432 becomes ON, an amplifying current flows directly to DY through C441 © DY © 0432 © GND, and defection is performed in the last half of the scanning period. Next, when Q432 becomes OFF, the charge that had been stored in DY up to that point releases a resonance current to the resonant capacitors C421/C423 and charges them. The current stored in C421/C423 is then flowed back to DY, and an opposite charge is then stored in DY. This opposite charge then switches the dumper diode in Q432 ON, the resonance state is completed, and an amplifying current is then flowed again directly to DY through the dumper diode. By this means, deflection in the first half of the scanning period is performed, and when Q432 becomes ON at the end of the first half of the scanning period, deflection during the last half is begun, thus completing one cycle. In the PCC circuit consisting of Q461 and Q462, the parabola signal supplied from the vertical circuit is added at the horizontal output stage and pincushion compensation is performed by varying the DC voltage bias. Further, the ABL voltage is feedback to the base of Q462 to compensate for width variations due to variations in the beam current. 7. CPU <System and Teletext Control> Pin description Pin1: Tuning voltage output Pin2: Brightness control output (6-bit DAC) Pin3: Contrast control output (6-bit DAC) Pin4: Colour control output (6-bit DAC) Pin5: Sharpness control output(6-bit DAC) Pin6: Not used (GND) Pin7: Not used (GND) Pin8: Power ON/OFF output (H:ON) Pin9: AFT signal input Pin10: Option SW1 & Keyboard scan input (DC) Pin11: Option SW2 Pin12: 50/60Hz switch input (50Hz: Hi) Pin13: GND Pin14: TV/AV switch output (TV: Hi) Pin15: S-VHS switch output (S-VHS: Hi) Pin16: Option SW3 (2AV: Hi) Pin17: Function signal input for SCART1 Pin18: Function signal input for SCART2 Pin19: Power LED drive output1 Pin20: Option SW4 & Power LED drive output2 Pin21: Ignore output Pin22: GND Pin23: CVBS input0 (Internal) Pin24: CVBS input1 (Internal/External)

Pin25: Black Pin26: IREF Pin27: Odd/Even output Pin28: GND Pin29: Pin30: V-deflection stop output Pin31: RGB REF Pin32: Blue output for OSD Pin33: Green output for OSD Pin34: Red output for OSD Pin35: Blanking output for OSD Pin36: H-sync. input (Horizontal pulse for OSD) Pin37: V-sync. input (Vertical pulse for OSD) Pin38~39: Supply (+5V) Pin 40: OSC GND Pin 41: Oscillator input for CPU Pin 42: Oscillator output for CPU Pin 43: Reset input Pin 44: Supply (+5V) Pin 45: Protect signal input (L:Power circuit defects) Pin 46: Ident. signal input Pin 47: R/C signal input Pin 48: Mute output in no picture Pin 49: I2C bus SCL (Serial clock) Pin 50: I2C bus SDA (Serial date) Pin 51: Option SW5 & Band select output1 Pin 52: Band select output2

-5F2VAM

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