|
Who's Online
There currently are 6043 guests online.
|
Categories
|
Information
|
Featured Product
|
|
|
|
|
There are currently no product reviews.
;
It was magic after so many years to still be able to source this info. It was equally amazing to return my Pioneer receiver to it near new sound quality AFTER NEARLY 30 YEARS! Thank you for this ability!
;
Very quick and easy website to use and fast download of manual, quality of manual is excellent and will be pleased to use this service again in the future, thanks so much!
;
Easy and secure way to get a complete service manual of a vintage hifi component. Only some parts of the print copy are dificult to read. Nice price!
;
The manual is an excellent reproduction with complete schematics, made troubleshooting and repair a simple process.
;
Up to now you are the BEST! Prompt-efficient and so reasonable ! I have been after SONY service manual for quite some time !Thank you very much ! I can recomend your service to
all my collegagues ! V.Bergfield .
CIRCUIT OPERATIONAL DESCRIPTION
4) SDRAM : HY57V660ET-7 (DV-000S/DV-00S/DV-200S/DV-300S/DV-400S/DV-70S) This sends and receives data with MPEG decoder and performs the video signal processing. Every video signal output from DVD player is once stored in SDRAM and then encoded in MPEG decoder and finally output into the analog signal. SDRAM applied to DVD module has the capacity of 6MBit(048576 x 6bit x Bank), sends and receives data with MPEG decoder by 6 bit. Description THE Hynix HY57V660E is a 6,777,26 bits CMOS Synchronous DRAM, ideally suited for the main memory and graphic appli-cations which require large memory density and high bandwidth. HY57V660E is organized as 2banks of 524,288x6. HY57V660E is offering fully synchronous operation referenced to a positive edge clock. All inputs and outputs are synchronizedwith the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and outputvoltage levels are compatible with LVTTL. Programmable options include the length of pipeline (Read latency of ,2 or 3), the number of consecutive read or write cycles initi-ated by a single control command (Burst length of ,2,4,8 or full page), and the burst count sequence(sequential or interleave). Aburst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by anew burst read or write command on any cycle. (This pipeline design is not restricted by a `2N` rule.)
3
Sm(DAEWOO_1389C)060109.indd
13
2006-1-13
15:42:03
|
|
|
> |
|