|
|
|
Categories
|
|
Information
|
|
Featured Product
|
|
|
 |
|
|
There are currently no product reviews.
 ;
MACKIE HR824 26 pages English-only Service Manual contains:
1) HR824 technical overview with the description of front and rear panel switches.
2) HR824 specs
3) Block Diagram
4) Wiring Diagram
5) Packaging management
6) Spare part & final assembly list (for PCB rev A and B) + exploded view
7) Test Procedures (where, how to measure voltage...) including Test Point diagram on the PCB.
8) IC and Transistor charts.
Excellent guide: very clear, good scan quality enabling us to print readable diagram :-)
Note:
Mackie HR824 make extensive use of surface mount devices (SMD). Service on the HR824 must
only be undertaken by experienced service technicians with the right tools, experience and patience to perform surface mount rework when needed.
 ;
This Service manual is very well scanned and its clean to read, no any anti-theft words that un-english could understand. I got my CCD600 working with this manual and it´s clear shematics :)
 ;
I was very pleased with the service provided and was surprised at how good the quality was of the manual. I thought it may be a third generation copy or so, but it is as good as the websites that charge 3 times this much. I repair some electronics for family and friends without charge, so this is perfect for me. Thank you very much.
 ;
The service was great and the document was also great. Highly recommend!!!!
If anyone has a users manual... Please email me. need one. $ [email protected]
 ;
I needed a service manual as the display on my oscilloscope was very dim. I thought I'd give owner-manuals.com a try, as they advertised a huge number of manuals. Sure enough they had one listed. I bought it hoping it would be useful... actually, I bought it hoping it would be readable! I've had manuals from online sources in the past, and been very disappointed. Not this time! An excellent manual, complete, and very readable. Using it I fixed my 'scope, and as such the manual was an investment that paid off manyfold. Do I have any complaints? One very minor one - The circuit diagrams could have been scanned at a higher resolution, as some of the details were a little difficult to make out - not impossible, just not as easy as my old eyes would like! Overall, I'm very satisfied with my manual, and I will certainly be using this company again. Well done.
HT-R340 IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-4
Q201 : ADSP-21266(32 bit, Floating-point SHARC DSP)-4/5
TERMINAL DESCRIPTION(3/3)
Pin CLKIN Type I Function Local Clock In. Used in conjunction with XTAL. CLKIN is the ADSP-21266 clock input. It configures the ADSP-21266 to use either its internal clock generator or an external clock source. Connecting the necessary components to CLKIN and XTAL enables the internal clock generator. Connecting the external clock to CLKIN while leaving XTAL unconnected configures the ADSP-21266 to use the external clock source such as an external clock oscillator. The core is clocked either by the PLL output or this clock input depending on the CLKCFG1�0 pin settings. CLKIN may not be halted, changed, or operated below the specified frequency. Crystal Oscillator Terminal. Used in conjunction with CLKIN to drive an external crystal. Core/CLKIN Ratio Control. These pins set the start up clock frequency. See Table 6 for a description of the clock configuration modes. Note that the operating frequency can be changed by programming the PLL multiplier and divider in the PMCTL register at any time after the core comes out of reset. Reset Out/Local Clock Out. Drives out the core reset signal to an external device. CLKOUT can also be configured as a reset out pin (RSTOUT). The functionality can be switched between the PLL output clock and reset out by setting Bit 12 of the PMCTL register. The default is reset out. Processor Reset. Resets the ADSP-21266 to a known state. Upon deassertion, there is a 4096 CLKIN cycle latency for the PLL to lock. After this time, the core begins program execution from the hardware reset vector address. The RESET input must be asserted (low) at power-up. Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted (pulsed low) after power-up or held low for proper operation of the ADSP-21266. Test Mode Select (JTAG). Used to control the test state machine. TMS has a 22.5 k ohms internal pull-up resistor. Test Data Input (JTAG). Provides serial data for the boundary scan logic. TDI has a 22.5 k ohms internal pull-up resistor. Test Data Output (JTAG). Serial scan output of the boundary scan path. Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after power-up or held low for proper operation of the ADSP-21266. TRST has a 22.5 k ohms internal pull-up resistor. Emulation Status. Must be connected to the ADSP-21266 Analog Devices DSP Tools product line of JTAG emulators target board connector only. EMU has a 22.5 k ohms internal pull-up resistor. Core Power Supply. Nominally +1.2 V dc and supplies the DSP�s core processor (13 pins on the BGA package, 32 pins on the LQFP package). I/O Power Supply. Nominally +3.3 V dc (6 pins on the BGA package, 10 pins on the LQFP package). Analog Power Supply. Nominally +1.2 V dc and supplies the DSP�s internal PLL (clock generator). This pin has the same specifications as VDDINT, except that added filtering circuitry is required. For more information, see Power Supplies on Page 8. Analog Power Supply Return. Power Supply Return. (54 pins on the BGA package, 39 pins on the LQFP package).
XTAL
O
CLKCFG1�0 I
RSTOUT/ CLKOUT
O
RESET
I/A
TCK TMS TDI TDO TRST EMU VDDINT
I I/S I/S O I/A O (O/D) P
VDDEXT AVDD
P P
AVSS GND
G G
|
|
 |
> |
|