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Pin No.
136 137 138 139 140 141 142 143 144
Pin Name
ALE IO BHE IO RD IO IDE_ENA IO IDE_DIR
I/O
I � I � I � I � I Address latch enable. Not used. Bus high enable. Not used. Read signal. Not used. IDE enable. Not used. IDE direction.
Description
IC, BU2872AK Pin No.
1~4 5 6 7 8 9 10 ~ 13 14 15 ~ 25 26 27 28 ~ 37 38 39 ~ 42 43 44
Pin Name
SW1 ~ SW4 SO SI VSS SCK CS K1 ~ K4 VDD S1 ~ S11 G11 VEE G10 ~ G1 VDD L4 ~ L1 VSS OSC
I/O
I O I I I I I I O O I O I O I I/O transmission. (Connected to VSS) Serial data are output to higher bits. Serial data are input from higher bits. Connected to system ground. Serial data is fetched at start-up.
Description
General purpose input terminal. The input data can be sent to microprocessor in serial
Serial initialization at "L". Valid when "H". Key scan data input terminal. Connected to system power supply. Segment output terminal. Output is P-channel open drain having pull-down resistor. Output terminal for grid. Output is P-channel open drain having pull-down resistor. Pull-down resistor for driver output is connected to this terminal. Output terminal for grid. Output is P-channel open drain having pull-down resistor. Connected to system power supply. LED output terminal. CMOS output. (Pin 39 not used) Connected to system ground. External capacitor for oscillation is connected to this terminal.
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